/**
* @file        sdram_map_play_define.h
* @brief       None
* @note        None
* @attention   None
*
* <B><I>Copyright 2018 Socionext Inc.</I></B>
*/

#ifndef _SDRAM_MAP_PLAY_DEFINE_H_
#define _SDRAM_MAP_PLAY_DEFINE_H_

#define SDRAM_WIDTH_PLAY_HDMI_MAIN	(4096)
#define SDRAM_LINES_PLAY_HDMI_MAIN	(2160)
#define SDRAM_BNK_PLAY_HDMI_MAIN	(4)
#define SDRAM_SIZ_PLAY_HDMI_MAIN	(0xCA8000ul)
#define SDRAM_ADR_PLAY_HDMI_MAIN_0	(0x50084000ul)
#define SDRAM_ADR_PLAY_HDMI_MAIN_1	(0x50D2C000ul)
#define SDRAM_ADR_PLAY_HDMI_MAIN_2	(0x519D4000ul)
#define SDRAM_ADR_PLAY_HDMI_MAIN_3	(0x5267C000ul)

#define SDRAM_WIDTH_PLAY_IMAGE_SAVE_AREA_HD	(1920)
#define SDRAM_LINES_PLAY_IMAGE_SAVE_AREA_HD	(1080)
#define SDRAM_BNK_PLAY_IMAGE_SAVE_AREA_HD	(1)
#define SDRAM_SIZ_PLAY_IMAGE_SAVE_AREA_HD	(0x3F4800ul)
#define SDRAM_ADR_PLAY_IMAGE_SAVE_AREA_HD	(0x53324000ul)

#define SDRAM_ADR_PLAY_IMAGE_SAVE_AREA_HD_END	(0x53718800ul)

#define SDRAM_WIDTH_PLAY_IMAGE_SAVE_AREA_VGA	(640)
#define SDRAM_LINES_PLAY_IMAGE_SAVE_AREA_VGA	(480)
#define SDRAM_BNK_PLAY_IMAGE_SAVE_AREA_VGA	(1)
#define SDRAM_SIZ_PLAY_IMAGE_SAVE_AREA_VGA	(0x96000ul)
#define SDRAM_ADR_PLAY_IMAGE_SAVE_AREA_VGA	(0x53718800ul)

#define SDRAM_ADR_PLAY_IMAGE_SAVE_AREA_VGA_END	(0x537AE800ul)

#define SDRAM_WIDTH_PLAY_DISP_WIND_DATA_HD	(1920)
#define SDRAM_LINES_PLAY_DISP_WIND_DATA_HD	(1080)
#define SDRAM_BNK_PLAY_DISP_WIND_DATA_HD	(1)
#define SDRAM_SIZ_PLAY_DISP_WIND_DATA_HD	(0x2F7600ul)
#define SDRAM_ADR_PLAY_DISP_WIND_DATA_HD	(0x537AE800ul)

#define SDRAM_ADR_PLAY_DISP_WIND_DATA_HD_END	(0x53AA5E00ul)

#define SDRAM_WIDTH_PLAY_DISP_WIND_DATA_VGA	(640)
#define SDRAM_LINES_PLAY_DISP_WIND_DATA_VGA	(480)
#define SDRAM_BNK_PLAY_DISP_WIND_DATA_VGA	(1)
#define SDRAM_SIZ_PLAY_DISP_WIND_DATA_VGA	(0x70800ul)
#define SDRAM_ADR_PLAY_DISP_WIND_DATA_VGA	(0x53AA5E00ul)

#define SDRAM_ADR_PLAY_DISP_WIND_DATA_VGA_END	(0x53B16600ul)

#define SDRAM_ADR_PLAY_AUDIO_TOP	(0x53B16600ul)

#define SDRAM_BNK_PLAY_PCM_0	(1)
#define SDRAM_SIZ_PLAY_PCM_0	(0x2EE00ul)
#define SDRAM_ADR_PLAY_PCM_0	(0x53B16600ul)

#define SDRAM_BNK_PLAY_PCM_1	(1)
#define SDRAM_SIZ_PLAY_PCM_1	(0x2EE00ul)
#define SDRAM_ADR_PLAY_PCM_1	(0x53B45400ul)

#define SDRAM_BNK_PLAY_PCM_2	(1)
#define SDRAM_SIZ_PLAY_PCM_2	(0x2EE00ul)
#define SDRAM_ADR_PLAY_PCM_2	(0x53B74200ul)

#define SDRAM_BNK_PLAY_PCM_3	(1)
#define SDRAM_SIZ_PLAY_PCM_3	(0x2EE00ul)
#define SDRAM_ADR_PLAY_PCM_3	(0x53BA3000ul)

#define SDRAM_ADR_PLAY_PCM_END	(0x53BD1E00ul)

#define SDRAM_BNK_PLAY_AUDIO_0	(1)
#define SDRAM_SIZ_PLAY_AUDIO_0	(0x2EE00ul)
#define SDRAM_ADR_PLAY_AUDIO_0	(0x53BD1E00ul)

#define SDRAM_BNK_PLAY_AUDIO_1	(1)
#define SDRAM_SIZ_PLAY_AUDIO_1	(0x2EE00ul)
#define SDRAM_ADR_PLAY_AUDIO_1	(0x53C00C00ul)

#define SDRAM_BNK_PLAY_AUDIO_2	(1)
#define SDRAM_SIZ_PLAY_AUDIO_2	(0x2EE00ul)
#define SDRAM_ADR_PLAY_AUDIO_2	(0x53C2FA00ul)

#define SDRAM_BNK_PLAY_AUDIO_3	(1)
#define SDRAM_SIZ_PLAY_AUDIO_3	(0x2EE00ul)
#define SDRAM_ADR_PLAY_AUDIO_3	(0x53C5E800ul)

#define SDRAM_ADR_PLAY_AUDIO_END	(0x53C8D600ul)

#define SDRAM_WIDTH_PLAY_IMAGE_DECODE_AREA	(7360)
#define SDRAM_LINES_PLAY_IMAGE_DECODE_AREA	(4912)
#define SDRAM_BNK_PLAY_IMAGE_DECODE_AREA	(1)
#define SDRAM_SIZ_PLAY_IMAGE_DECODE_AREA	(0x44F4800ul)
#define SDRAM_ADR_PLAY_IMAGE_DECODE_AREA	(0x53C8D600ul)

#define SDRAM_ADR_PLAY_IMAGE_DECODE_AREA_END	(0x58181E00ul)

#define SDRAM_WIDTH_PLAY_SINGLE_READ_AHEAD_AREA	(1920)
#define SDRAM_LINES_PLAY_SINGLE_READ_AHEAD_AREA	(1088)
#define SDRAM_BNK_PLAY_SINGLE_READ_AHEAD_AREA	(5)
#define SDRAM_SIZ_PLAY_SINGLE_READ_AHEAD_AREA	(0x3FC000ul)
#define SDRAM_ADR_PLAY_SINGLE_READ_AHEAD_AREA_0	(0x58181E00ul)
#define SDRAM_ADR_PLAY_SINGLE_READ_AHEAD_AREA_1	(0x5857DE00ul)
#define SDRAM_ADR_PLAY_SINGLE_READ_AHEAD_AREA_2	(0x58979E00ul)
#define SDRAM_ADR_PLAY_SINGLE_READ_AHEAD_AREA_3	(0x58D75E00ul)
#define SDRAM_ADR_PLAY_SINGLE_READ_AHEAD_AREA_4	(0x59171E00ul)

#define SDRAM_ADR_PLAY_SINGLE_READ_AHEAD_AREA_END	(0x5956DE00ul)

#define SDRAM_ADR_PLAY_REMAIN_AREA	(0x5956DE00ul)

#define SDRAM_ADR_PLAY_REMAIN_END	(0x7CA3B300ul)

#define SDRAM_WIDTH_PLAY_INDEX_VIEW_IMG_AREA_HD	(3840)
#define SDRAM_LINES_PLAY_INDEX_VIEW_IMG_AREA_HD	(2160)
#define SDRAM_BNK_PLAY_INDEX_VIEW_IMG_AREA_HD	(1)
#define SDRAM_SIZ_PLAY_INDEX_VIEW_IMG_AREA_HD	(0xBDD800ul)
#define SDRAM_ADR_PLAY_INDEX_VIEW_IMG_AREA_HD	(0x5956DE00ul)

#define SDRAM_ADR_PLAY_INDEX_VIEW_IMG_AREA_HD_END	(0x5A14B600ul)

#define SDRAM_WIDTH_PLAY_INDEX_VIEW_IMG_AREA_LCD	(640)
#define SDRAM_LINES_PLAY_INDEX_VIEW_IMG_AREA_LCD	(480)
#define SDRAM_BNK_PLAY_INDEX_VIEW_IMG_AREA_LCD	(1)
#define SDRAM_SIZ_PLAY_INDEX_VIEW_IMG_AREA_LCD	(0x70800ul)
#define SDRAM_ADR_PLAY_INDEX_VIEW_IMG_AREA_LCD	(0x5A14B600ul)

#define SDRAM_ADR_PLAY_INDEX_VIEW_IMG_AREA_LCD_END	(0x5A1BBE00ul)

#define SDRAM_WIDTH_PLAY_DRAW_FILE_WORK_AREA	(2304)
#define SDRAM_LINES_PLAY_DRAW_FILE_WORK_AREA	(1728)
#define SDRAM_BNK_PLAY_DRAW_FILE_WORK_AREA	(1)
#define SDRAM_SIZ_PLAY_DRAW_FILE_WORK_AREA	(0x798000ul)
#define SDRAM_ADR_PLAY_DRAW_FILE_WORK_AREA	(0x5956DE00ul)

#define SDRAM_ADR_PLAY_DRAW_FILE_WORK_AREA_END	(0x59D05E00ul)

#define SDRAM_WIDTH_PLAY_DRAW_FILE_REC_AREA	(2304)
#define SDRAM_LINES_PLAY_DRAW_FILE_REC_AREA	(1728)
#define SDRAM_BNK_PLAY_DRAW_FILE_REC_AREA	(1)
#define SDRAM_SIZ_PLAY_DRAW_FILE_REC_AREA	(0x3CC00ul)
#define SDRAM_ADR_PLAY_DRAW_FILE_REC_AREA	(0x59D05E00ul)

#define SDRAM_ADR_PLAY_DRAW_FILE_REC_AREA_END	(0x59D42A00ul)

#define SDRAM_WIDTH_PLAY_IMAGE_LOAD_AREA	(7360)
#define SDRAM_LINES_PLAY_IMAGE_LOAD_AREA	(4912)
#define SDRAM_BNK_PLAY_IMAGE_LOAD_AREA	(1)
#define SDRAM_SIZ_PLAY_IMAGE_LOAD_AREA	(0x227A400ul)
#define SDRAM_ADR_PLAY_IMAGE_LOAD_AREA	(0x7CA3B300ul)

#define SDRAM_ADR_PLAY_IMAGE_LOAD_AREA_END	(0x7ECB5700ul)

#define SDRAM_WIDTH_PLAY_AHEAD_AREA_LOAD_AREA	(1920)
#define SDRAM_LINES_PLAY_AHEAD_AREA_LOAD_AREA	(1080)
#define SDRAM_BNK_PLAY_AHEAD_AREA_LOAD_AREA	(1)
#define SDRAM_SIZ_PLAY_AHEAD_AREA_LOAD_AREA	(0x1FA400ul)
#define SDRAM_ADR_PLAY_AHEAD_AREA_LOAD_AREA	(0x7ECB5700ul)

#define SDRAM_ADR_PLAY_AHEAD_AREA_LOAD_AREA_END	(0x7EEAFB00ul)

#define SDRAM_WIDTH_PLAY_IMAGE_HALF_REC_AREA_4_Y	(640)
#define SDRAM_LINES_PLAY_IMAGE_HALF_REC_AREA_4_Y	(8)
#define SDRAM_BNK_PLAY_IMAGE_HALF_REC_AREA_4_Y	(1)
#define SDRAM_SIZ_PLAY_IMAGE_HALF_REC_AREA_4_Y	(0x1400ul)
#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_4_Y	(0x7EEAFB00ul)

#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_4_Y_END	(0x7EEB0F00ul)

#define SDRAM_WIDTH_PLAY_IMAGE_HALF_REC_AREA_3_Y	(810)
#define SDRAM_LINES_PLAY_IMAGE_HALF_REC_AREA_3_Y	(8)
#define SDRAM_BNK_PLAY_IMAGE_HALF_REC_AREA_3_Y	(1)
#define SDRAM_SIZ_PLAY_IMAGE_HALF_REC_AREA_3_Y	(0x1950ul)
#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_3_Y	(0x7EEB0F00ul)

#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_3_Y_END	(0x7EEB2860ul)

#define SDRAM_WIDTH_PLAY_IMAGE_HALF_REC_AREA_2_Y	(1620)
#define SDRAM_LINES_PLAY_IMAGE_HALF_REC_AREA_2_Y	(8)
#define SDRAM_BNK_PLAY_IMAGE_HALF_REC_AREA_2_Y	(1)
#define SDRAM_SIZ_PLAY_IMAGE_HALF_REC_AREA_2_Y	(0x32A0ul)
#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_2_Y	(0x7EEB2860ul)

#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_2_Y_END	(0x7EEB5B00ul)

#define SDRAM_WIDTH_PLAY_IMAGE_HALF_REC_AREA_1_Y	(1840)
#define SDRAM_LINES_PLAY_IMAGE_HALF_REC_AREA_1_Y	(8)
#define SDRAM_BNK_PLAY_IMAGE_HALF_REC_AREA_1_Y	(1)
#define SDRAM_SIZ_PLAY_IMAGE_HALF_REC_AREA_1_Y	(0x3980ul)
#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_1_Y	(0x7EEB5B00ul)

#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_1_Y_END	(0x7EEB9480ul)

#define SDRAM_WIDTH_PLAY_IMAGE_HALF_REC_AREA_0_Y	(3680)
#define SDRAM_LINES_PLAY_IMAGE_HALF_REC_AREA_0_Y	(2456)
#define SDRAM_BNK_PLAY_IMAGE_HALF_REC_AREA_0_Y	(1)
#define SDRAM_SIZ_PLAY_IMAGE_HALF_REC_AREA_0_Y	(0x89E900ul)
#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_0_Y	(0x7EEB9480ul)

#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_0_Y_END	(0x7F757D80ul)

#define SDRAM_WIDTH_PLAY_IMAGE_HALF_REC_AREA_4_C	(640)
#define SDRAM_LINES_PLAY_IMAGE_HALF_REC_AREA_4_C	(8)
#define SDRAM_BNK_PLAY_IMAGE_HALF_REC_AREA_4_C	(1)
#define SDRAM_SIZ_PLAY_IMAGE_HALF_REC_AREA_4_C	(0x1400ul)
#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_4_C	(0x7F757D80ul)

#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_4_C_END	(0x7F759180ul)

#define SDRAM_WIDTH_PLAY_IMAGE_HALF_REC_AREA_3_C	(810)
#define SDRAM_LINES_PLAY_IMAGE_HALF_REC_AREA_3_C	(8)
#define SDRAM_BNK_PLAY_IMAGE_HALF_REC_AREA_3_C	(1)
#define SDRAM_SIZ_PLAY_IMAGE_HALF_REC_AREA_3_C	(0x1950ul)
#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_3_C	(0x7F759180ul)

#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_3_C_END	(0x7F75AAE0ul)

#define SDRAM_WIDTH_PLAY_IMAGE_HALF_REC_AREA_2_C	(1620)
#define SDRAM_LINES_PLAY_IMAGE_HALF_REC_AREA_2_C	(8)
#define SDRAM_BNK_PLAY_IMAGE_HALF_REC_AREA_2_C	(1)
#define SDRAM_SIZ_PLAY_IMAGE_HALF_REC_AREA_2_C	(0x32A0ul)
#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_2_C	(0x7F75AAE0ul)

#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_2_C_END	(0x7F75DD80ul)

#define SDRAM_WIDTH_PLAY_IMAGE_HALF_REC_AREA_1_C	(1840)
#define SDRAM_LINES_PLAY_IMAGE_HALF_REC_AREA_1_C	(8)
#define SDRAM_BNK_PLAY_IMAGE_HALF_REC_AREA_1_C	(1)
#define SDRAM_SIZ_PLAY_IMAGE_HALF_REC_AREA_1_C	(0x3980ul)
#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_1_C	(0x7F75DD80ul)

#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_1_C_END	(0x7F761700ul)

#define SDRAM_WIDTH_PLAY_IMAGE_HALF_REC_AREA_0_C	(3680)
#define SDRAM_LINES_PLAY_IMAGE_HALF_REC_AREA_0_C	(2456)
#define SDRAM_BNK_PLAY_IMAGE_HALF_REC_AREA_0_C	(1)
#define SDRAM_SIZ_PLAY_IMAGE_HALF_REC_AREA_0_C	(0x89E900ul)
#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_0_C	(0x7F761700ul)

#define SDRAM_ADR_PLAY_IMAGE_HALF_REC_AREA_0_C_END	(0x80000000ul)

#define SDRAM_BNK_HOST_JPEG_DEMUXER_READ_DATA_AREA	(1)
#define SDRAM_SIZ_HOST_JPEG_DEMUXER_READ_DATA_AREA	(0x600000ul)
#define SDRAM_ADR_HOST_JPEG_DEMUXER_READ_DATA_AREA	(0xA9343000ul)

#define SDRAM_BNK_HOST_MP4_DEMUXER_READ_DATA_AREA	(1)
#define SDRAM_SIZ_HOST_MP4_DEMUXER_READ_DATA_AREA	(0x761B00ul)
#define SDRAM_ADR_HOST_MP4_DEMUXER_READ_DATA_AREA	(0xA9943000ul)

#define SDRAM_BNK_HOST_MP4_DEMUXER_PARSED_DATA_AREA	(1)
#define SDRAM_SIZ_HOST_MP4_DEMUXER_PARSED_DATA_AREA	(0x66D920ul)
#define SDRAM_ADR_HOST_MP4_DEMUXER_PARSED_DATA_AREA	(0xAA0A4B00ul)

#define SDRAM_BNK_HOST_ENCODED_BITS_DATA_AREA	(1)
#define SDRAM_SIZ_HOST_ENCODED_BITS_DATA_AREA	(0x900000ul)
#define SDRAM_ADR_HOST_ENCODED_BITS_DATA_AREA	(0xAA712420ul)

#define SDRAM_WIDTH_PLAY_THM_RGB	(320)
#define SDRAM_LINES_PLAY_THM_RGB	(240)
#define SDRAM_BNK_PLAY_THM_RGB	(80)
#define SDRAM_SIZ_PLAY_THM_RGB	(0x4B000ul)
#define SDRAM_ADR_PLAY_THM_RGB_0	(0xAB012420ul)
#define SDRAM_ADR_PLAY_THM_RGB_1	(0xAB05D420ul)
#define SDRAM_ADR_PLAY_THM_RGB_2	(0xAB0A8420ul)
#define SDRAM_ADR_PLAY_THM_RGB_3	(0xAB0F3420ul)
#define SDRAM_ADR_PLAY_THM_RGB_4	(0xAB13E420ul)
#define SDRAM_ADR_PLAY_THM_RGB_5	(0xAB189420ul)
#define SDRAM_ADR_PLAY_THM_RGB_6	(0xAB1D4420ul)
#define SDRAM_ADR_PLAY_THM_RGB_7	(0xAB21F420ul)
#define SDRAM_ADR_PLAY_THM_RGB_8	(0xAB26A420ul)
#define SDRAM_ADR_PLAY_THM_RGB_9	(0xAB2B5420ul)
#define SDRAM_ADR_PLAY_THM_RGB_10	(0xAB300420ul)
#define SDRAM_ADR_PLAY_THM_RGB_11	(0xAB34B420ul)
#define SDRAM_ADR_PLAY_THM_RGB_12	(0xAB396420ul)
#define SDRAM_ADR_PLAY_THM_RGB_13	(0xAB3E1420ul)
#define SDRAM_ADR_PLAY_THM_RGB_14	(0xAB42C420ul)
#define SDRAM_ADR_PLAY_THM_RGB_15	(0xAB477420ul)
#define SDRAM_ADR_PLAY_THM_RGB_16	(0xAB4C2420ul)
#define SDRAM_ADR_PLAY_THM_RGB_17	(0xAB50D420ul)
#define SDRAM_ADR_PLAY_THM_RGB_18	(0xAB558420ul)
#define SDRAM_ADR_PLAY_THM_RGB_19	(0xAB5A3420ul)
#define SDRAM_ADR_PLAY_THM_RGB_20	(0xAB5EE420ul)
#define SDRAM_ADR_PLAY_THM_RGB_21	(0xAB639420ul)
#define SDRAM_ADR_PLAY_THM_RGB_22	(0xAB684420ul)
#define SDRAM_ADR_PLAY_THM_RGB_23	(0xAB6CF420ul)
#define SDRAM_ADR_PLAY_THM_RGB_24	(0xAB71A420ul)
#define SDRAM_ADR_PLAY_THM_RGB_25	(0xAB765420ul)
#define SDRAM_ADR_PLAY_THM_RGB_26	(0xAB7B0420ul)
#define SDRAM_ADR_PLAY_THM_RGB_27	(0xAB7FB420ul)
#define SDRAM_ADR_PLAY_THM_RGB_28	(0xAB846420ul)
#define SDRAM_ADR_PLAY_THM_RGB_29	(0xAB891420ul)
#define SDRAM_ADR_PLAY_THM_RGB_30	(0xAB8DC420ul)
#define SDRAM_ADR_PLAY_THM_RGB_31	(0xAB927420ul)
#define SDRAM_ADR_PLAY_THM_RGB_32	(0xAB972420ul)
#define SDRAM_ADR_PLAY_THM_RGB_33	(0xAB9BD420ul)
#define SDRAM_ADR_PLAY_THM_RGB_34	(0xABA08420ul)
#define SDRAM_ADR_PLAY_THM_RGB_35	(0xABA53420ul)
#define SDRAM_ADR_PLAY_THM_RGB_36	(0xABA9E420ul)
#define SDRAM_ADR_PLAY_THM_RGB_37	(0xABAE9420ul)
#define SDRAM_ADR_PLAY_THM_RGB_38	(0xABB34420ul)
#define SDRAM_ADR_PLAY_THM_RGB_39	(0xABB7F420ul)
#define SDRAM_ADR_PLAY_THM_RGB_40	(0xABBCA420ul)
#define SDRAM_ADR_PLAY_THM_RGB_41	(0xABC15420ul)
#define SDRAM_ADR_PLAY_THM_RGB_42	(0xABC60420ul)
#define SDRAM_ADR_PLAY_THM_RGB_43	(0xABCAB420ul)
#define SDRAM_ADR_PLAY_THM_RGB_44	(0xABCF6420ul)
#define SDRAM_ADR_PLAY_THM_RGB_45	(0xABD41420ul)
#define SDRAM_ADR_PLAY_THM_RGB_46	(0xABD8C420ul)
#define SDRAM_ADR_PLAY_THM_RGB_47	(0xABDD7420ul)
#define SDRAM_ADR_PLAY_THM_RGB_48	(0xABE22420ul)
#define SDRAM_ADR_PLAY_THM_RGB_49	(0xABE6D420ul)
#define SDRAM_ADR_PLAY_THM_RGB_50	(0xABEB8420ul)
#define SDRAM_ADR_PLAY_THM_RGB_51	(0xABF03420ul)
#define SDRAM_ADR_PLAY_THM_RGB_52	(0xABF4E420ul)
#define SDRAM_ADR_PLAY_THM_RGB_53	(0xABF99420ul)
#define SDRAM_ADR_PLAY_THM_RGB_54	(0xABFE4420ul)
#define SDRAM_ADR_PLAY_THM_RGB_55	(0xAC02F420ul)
#define SDRAM_ADR_PLAY_THM_RGB_56	(0xAC07A420ul)
#define SDRAM_ADR_PLAY_THM_RGB_57	(0xAC0C5420ul)
#define SDRAM_ADR_PLAY_THM_RGB_58	(0xAC110420ul)
#define SDRAM_ADR_PLAY_THM_RGB_59	(0xAC15B420ul)
#define SDRAM_ADR_PLAY_THM_RGB_60	(0xAC1A6420ul)
#define SDRAM_ADR_PLAY_THM_RGB_61	(0xAC1F1420ul)
#define SDRAM_ADR_PLAY_THM_RGB_62	(0xAC23C420ul)
#define SDRAM_ADR_PLAY_THM_RGB_63	(0xAC287420ul)
#define SDRAM_ADR_PLAY_THM_RGB_64	(0xAC2D2420ul)
#define SDRAM_ADR_PLAY_THM_RGB_65	(0xAC31D420ul)
#define SDRAM_ADR_PLAY_THM_RGB_66	(0xAC368420ul)
#define SDRAM_ADR_PLAY_THM_RGB_67	(0xAC3B3420ul)
#define SDRAM_ADR_PLAY_THM_RGB_68	(0xAC3FE420ul)
#define SDRAM_ADR_PLAY_THM_RGB_69	(0xAC449420ul)
#define SDRAM_ADR_PLAY_THM_RGB_70	(0xAC494420ul)
#define SDRAM_ADR_PLAY_THM_RGB_71	(0xAC4DF420ul)
#define SDRAM_ADR_PLAY_THM_RGB_72	(0xAC52A420ul)
#define SDRAM_ADR_PLAY_THM_RGB_73	(0xAC575420ul)
#define SDRAM_ADR_PLAY_THM_RGB_74	(0xAC5C0420ul)
#define SDRAM_ADR_PLAY_THM_RGB_75	(0xAC60B420ul)
#define SDRAM_ADR_PLAY_THM_RGB_76	(0xAC656420ul)
#define SDRAM_ADR_PLAY_THM_RGB_77	(0xAC6A1420ul)
#define SDRAM_ADR_PLAY_THM_RGB_78	(0xAC6EC420ul)
#define SDRAM_ADR_PLAY_THM_RGB_79	(0xAC737420ul)

#define SDRAM_WIDTH_PLAY_DECODED_RGB	(4096)
#define SDRAM_LINES_PLAY_DECODED_RGB	(2160)
#define SDRAM_BNK_PLAY_DECODED_RGB	(1)
#define SDRAM_SIZ_PLAY_DECODED_RGB	(0x21C0000ul)
#define SDRAM_ADR_PLAY_DECODED_RGB	(0xAC782420ul)

#define SDRAM_WIDTH_PLAY_DECODED_RESIZE_YUV	(960)
#define SDRAM_LINES_PLAY_DECODED_RESIZE_YUV	(720)
#define SDRAM_BNK_PLAY_DECODED_RESIZE_YUV	(5)
#define SDRAM_SIZ_PLAY_DECODED_RESIZE_YUV	(0x151800ul)
#define SDRAM_ADR_PLAY_DECODED_RESIZE_YUV_0	(0xAE942420ul)
#define SDRAM_ADR_PLAY_DECODED_RESIZE_YUV_1	(0xAEA93C20ul)
#define SDRAM_ADR_PLAY_DECODED_RESIZE_YUV_2	(0xAEBE5420ul)
#define SDRAM_ADR_PLAY_DECODED_RESIZE_YUV_3	(0xAED36C20ul)
#define SDRAM_ADR_PLAY_DECODED_RESIZE_YUV_4	(0xAEE88420ul)

#define SDRAM_WIDTH_PLAY_DECODED_YUV_MAIN	(4800)
#define SDRAM_LINES_PLAY_DECODED_YUV_MAIN	(3600)
#define SDRAM_BNK_PLAY_DECODED_YUV_MAIN	(1)
#define SDRAM_SIZ_PLAY_DECODED_YUV_MAIN	(0x20F5800ul)
#define SDRAM_ADR_PLAY_DECODED_YUV_MAIN	(0xAEFD9C20ul)

#define SDRAM_WIDTH_PLAY_DECODED_YUV_THM	(320)
#define SDRAM_LINES_PLAY_DECODED_YUV_THM	(240)
#define SDRAM_BNK_PLAY_DECODED_YUV_THM	(1)
#define SDRAM_SIZ_PLAY_DECODED_YUV_THM	(0x25800ul)
#define SDRAM_ADR_PLAY_DECODED_YUV_THM	(0xB10CF420ul)

#define SDRAM_WIDTH_PLAY_MSC_BUFFER_AREA	(1024)
#define SDRAM_LINES_PLAY_MSC_BUFFER_AREA	(512)
#define SDRAM_BNK_PLAY_MSC_BUFFER_AREA	(1)
#define SDRAM_SIZ_PLAY_MSC_BUFFER_AREA	(0x100000ul)
#define SDRAM_ADR_PLAY_MSC_BUFFER_AREA	(0xB10F4C20ul)

#define SDRAM_WIDTH_PLAY_PTP_BUFFER_AREA	(5120)
#define SDRAM_LINES_PLAY_PTP_BUFFER_AREA	(512)
#define SDRAM_BNK_PLAY_PTP_BUFFER_AREA	(1)
#define SDRAM_SIZ_PLAY_PTP_BUFFER_AREA	(0x500000ul)
#define SDRAM_ADR_PLAY_PTP_BUFFER_AREA	(0xB11F4C20ul)


#endif
